Publication

International Conferences

Year 2024

No.

Publication

Title


1.

IEEE/ACM Design, Automation and Test in Europe Conference & Exhibition (DATE)

Trans-Net: Knowledge-Transferring Analog Circuit Optimizer with a Netlist-Based Circuit Representation (ACCEPTED)

Author | Ho-Jin Lee, Kyeong-Jun Lee, Youngchang Choi, Kyongsu Lee, Seokhyeong Kang, and Jae-Yoon Sim


2.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 94fsrms-Jitter and −249.3dB FoM 4.0GHz Ring-Oscillator-based MDLL with Background Calibration of Phase Offset and Injection Slope Mismatch (ACCEPTED)

Author | Dongjun Park, Heesung Roh, Seon-kyoo Lee, and Jae-Yoon Sim


3.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 246-fJ/b 13.3-Tb/s/mm Single-Ended Current-Mode Transceiver with Crosstalk Cancellation for Shield-Less Short-Reach Interconnect (ACCEPTED)

Author | Jaeho Lee, Kyongsu Lee, Jae-Yoon Sim, and Seon-kyoo Lee


4.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A Smart Contact Lens System with 433MHz Wireless Power and Data Transfer at a Modulation Index Down to 0.02% (ACCEPTED)

Author | Heesung Roh, Hyun Jin Yoo, Si-Youl Yoo, Seung Hee Pyen, Cheonhoo Jeon, and Jae-Yoon Sim

Year 2023

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A Cryogenic Controller IC for Superconducting Qubits with DRAG Pulse Generation by Direct Synthesis without Using Memory 

Author | Kiseo Kang, Donggyu Minn, Jaeho Lee, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)


3.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 28 nm 66.8 TOPS/W Sparsity-Aware Dynamic-Precision Deep-Learning Processor

Author | HanGyeol Mun, Hyunwoo Son, Seunghyun Moon, Jaehyun Park, ByungJun Kim, Jae-Yoon Sim


4.

IEEE Symposium on VLSI Technology and Circuits (VLSI)


5.

IEEE Symposium on VLSI Technology and Circuits (VLSI)


6.

European Solid-State Circuits Conference (ESSCIRC)


7.

ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED)

Joint Optimization of Cache Management and Graph Reordering for GCN Acceleration

Author | Kyeong-Jun Lee, ByungJun Kim, Han-Gyeol Mun, Seunghyun Moon, Jae-Yoon Sim

Year 2022

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A Cryo-CMOS Controller IC with Fully Integrated Frequency Generators for Superconducting Qubits

Author | Kiseo Kang, Donggyu Minn (equally contributed), Seunghun Bae, Jaeho Lee, Seongun Bae, Gichang Jung, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)


3.

IEEE International Solid-State Circuits Conference (ISSCC)

A Second-Order Temperature Compensated On-Chip R-RC Oscillator Achieving 7.93ppm/°C and 3.3pJ/Hz in -40°C to 125°C Temperature Range

Author | Youngwoo Ji, Jiawei Liao, Sina Arjmandpour, Alessandro Novello, Jae-Yoon Sim, Taekwang Jang


4.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

13-K Tnoise Cryo-CMOS Parametric Amplifier at 80 mK for Quantum Computers

Author | Goeun Baek, Seunghun Bae, Minki Lee, Hyuncheol Park, Kangseop Lee, Jae-Yoon Sim, Moonjoo Lee, Ho-Jin Song


5.

European Solid-State Circuits Conference (ESSCIRC)

Configurable Energy-Efficient Lattice-Based Post-Quantum Cryptography Processor for IoT Devices

Author | ByungJun Kim, Jaehan Park, Seunghyun Moon, Kiseo Kang, Jae-Yoon Sim


6.

ACM/IEEE Design Automatin Conference (DAC)

A Fast and Scalable Qubit-Mapping Method for Noisy Intermediate-Scale Quantum Computers

Author | Sunghye Park, Daeyeon Kim, Minhyuk Kweon, Jae-Yoon Sim, Seokhyeong Kang


7.

IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device

Author | Sunghye Park, Dohun Kim, Jae-Yoon Sim, Seokhyeong Kang

Year 2021

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)


2.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers

Author | Kiseo Kang, ByungJun Kim, Gahyun Choi, Sun-Kyung Lee, Jisoo Choi, Jaeho Lee, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Yonuk Chong, Jae-Yoon Sim

Year 2019

No.

Publication

Title


1.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna

Author | Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)

A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect

Author | Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim

Year 2018

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A 0.3-to-1.2V Frequency-Scalable Fractional-N ADPLL with a Speculative Dual-Referenced Interpolating TDC

Author | Minsoeb Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)

A 7.8Gb/s/pin 1.96pJ/b Compact Single-Ended TRX and CDR with Phase Difference Modulation for Highly Reflective Memory Interfaces

Author | Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim

Year 2017

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A 0.0047mm2 Highly Synthesizable TDC- and DCOLess Fractional-N PLL with a Seamless Lock Range of fREF to 1GHz

Author | Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)

A Quadrature Relaxation Oscillator with a Process-Induced Frequency-Error Compensation Loop

Author | Jahyun Koo, Kyoung-Sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim


3.

IEEE International Solid-State Circuits Conference (ISSCC)

A 9.3nW All-in-One Bandgap Voltage and Current Reference Circuit

Author | Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim,Hong-June Park, Jae-Yoon Sim


4.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

An FFE TX with 3.8x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility with Arbitrary Channel and RX Impedances

Author | Minsoo Choi, Sooeun Lee, Myungguk Lee, Jihoon Lee, Jae-Yoon Sim, Hong-June Park and Byungsub Kim


5.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 16.6-pJ/b 150-Mb/s Body Channel Communication Transceiver with Decision Feedback Equalization Improving >200% Area Efficiency

Author | Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, and Byungsub Kim


6.

IEEE International Solid-State Circuits Conference (ISSCC)

A Time-Based Receiver with 2-Tap DFE for a 12Gb/s/pin Single-Ended Transceiver for Mobile DRAM Interface in 0.8V 65nm CMOS

Author | Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park

Year 2016

No.

Publication

Title


1.

IEEE Asian Solid-State Circuit Conference (ASSCC)

All-Synthesizable 6Gbps Voltage-Mode Transmitter for Serial Link

Author | Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, and Hong-June Park


2.

IEEE International Conferenceon Consumer Electronics-Asia (ICCE-Asia)

An ECG monitoring system using Android smart phone

Author | Jaehyun Park, Kihwan Seong, Hyeon-Kyu Noh, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park


3.

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

A low-power LDO circuit with a fast load regulation

Author | Young-Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, and Hong-June Park


4.

International SoC Design Conference (ISOCC)

All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface

Author | Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park


5.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A Low-EMI Four-Bit Four-Wire Single-Ended DRAM Interface by Using a Three-Level Balanced Coding Scheme

Author | Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young-Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park


6.

International Conference on Electronics, Information and Communication (ICEIC)

All-synthesizable 5-phase Phase-Locked Loop

Author | Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park


7.

International Conference on Electronics, Information and Communication (ICEIC)

All-synthesizable current-mode transmitter driver for serial link interface

Author | Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park

Year 2015

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A 29-nW bandgap reference circuit

Author | Lee Jong Mi, Ji Youngwoo, Choi Seungnam, Cho Young-Chul, Jang Seong-Jin, Choi Joo Sun, Kim Byungsub, Park Hong-June, Jae-Yoon Sim


2.

International SoC Design Conference (ISOCC)

A Reduced-Size Look-Up-Table for ADC Sample-Times of a Single-Chip Non-Uniform-Sampling Digital-Beamformer for Ultasound Medical Imaging

Author | Seong-Eun Cho, Ji-Yong Um, Yoon-Jee Kim, Min-Kyun Chae, Jae-Yoon Sim, Hong-June Park



3.

International Technical Conference on Circuits Systems Computers and Communications (ITC-CSCC)

A 35dB-Linear Variable Gain Amplifier Circuit of Digital-Beamformer for Ultrasound Medical Imaging

Author | Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park


4.

IEEE/ACM International Computer-Aided Design Conference (ICCAD)

A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design

Author | Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim


5.

Advances in Analog Circuit Design (AACD)

Energy-Efficient CDCs for Millimeter Sensor Nodes

Author | Sechang Oh, Wanyeong Jung, Hyunsoo Ha, Jae-Yoon Sim, David Blaauw

Year 2014

No.

Publication

Title


1.

IEEE Custom Integrated Circuits Conference (CICC)

Voltage-Scalable 10-b Pipelined ADC with Current-Mode Amplifier

Author | Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)


3.

IEEE International Solid-State Circuits Conference (ISSCC)


4.

IEEE International Solid-State Circuits Conference (ISSCC)

An Analog-Digital-Hybrid Single-Chip RX Beamformer with Non-Uniform Sampling for 2D-CMUT Ultrasound Imaging to Achieve Wide Dynamic Range of Delay and Small Chip Area

Author | Ji-Yong Um, Eun-Woo Song, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun /Chae, Jongkeun Song, Baehyung Kim, Seunghun Lee, Jihoon Bang, Youngil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park


5.

IEEE International Solid-State Circuits Conference (ISSCC)

A Coefficient-Error-Robust FFE TX with 230% Eye-Variation Improvement Without Calibration in 65nm CMOS Technology

Author | Seungho Han, Sooenu Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim


6.

IEEE International Symposium on Circuits and Systems (ISCAS)

A 0.4 V Driving Multi-Touch Capacitive Sensor with the Driving Signal Frequency set to (n+0.5) Times the Inverse of the LCD VCOM Noise Period

Author | Jae-seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byung-Sub Kim, and Hong June Park

Year 2013

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A 95fJ/b Current-Mode Transceiver for 10mm On-Chip Interconnect

Author | Seon-Kyoo Lee, Seung-Hun Lee, Dennis Sylvester, David Blaauw, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)


3.

International SoC Design Conference (ISOCC)

Verilog Synthesis of USB 2.0 Full-speed Device PHY IP

Author | Kee-Bum Shin, Ki-Hwan Seong, Dong-Hee Yeo, Byungsub Kim, Jae-Yoon Sim, Hong June Park


4.

IEEE Asian Solid-State Circuits Conference (ASSCC)

A Power reduction of 37% in a Differential Serial Link Transceiver by Increasing the Termination Resistance

Author | Jong-Hoon Kim, Soo-Min Lee, Jae-Yoon Sim, Byungsub Kim, Hong-June Park


5.

IEEE Custom Integrated Circuits Conference (CICC)

45pW ESD Clamp Circuit for Ultra-Low Power Applications

Author | Yen-Po Chen, Yoonmyung Lee, Jae-Yoon Sim, Massimo Alioto, David Blaauw, Dennis Sylvester


6.

IEEE Custom Integrated Circuits Conference (CICC)

65nW CMOS temperature sensor for ultra-low power microsystems

Author | Seokhyeon Jeong, Jae-Yoon Sim, David Blaauw, Dennis Sylvester


7.

IEEE Custom Integrated Circuits Conference (CICC)

45pW ESD clamp circuit for ultra-low power applications

Author | Yen-Po Chen, Yoonmyung Lee, Jae-Yoon Sim, Massimo Alioto, David Blaauw, Dennis Sylvester


8.

IEEE International Solid-State Circuits Conference (ISSCC)

A 27% Reduction in Transceiver Power for Single-Ended Point-to-Point DRAM Interface with the Termination Resistance of 4xZ0 at both TX and RX

Author | Soo-Min Lee, Jong-Hoon Kim, Jongsam Kim, Yunsaing Kim, Hyunbae Lee, Jae-Yoon Sim, Hong-June Park


9.

International Conference of Electronics, Information and Communication

A 416-kS/s 12-bit algorithmic ADC compensating capacitance mismatch of MDAC in digital domain

Author | Ji-Yong Um, Jae-Seung Lee, Dong-Hee Yeo, Sang-su Lee, Kyeong-Gon Lee, Jae-Yoon Sim, Hong-June Park

Year 2012

No.

Publication

Title


1.

IEEE Custom Integrated Circuits Conference (CICC)

A 0.5V, 11.3-μW, 1-kS/s Resistive Sensor Interface Circuit with Correlated Double Sampling

Author | Hyunsoo Ha, Yunjae Suh, Seon-Kyoo Lee, Hong-June Park, Jae-Yoon Sim


2.

IEEE International Solid-State Circuits Conference (ISSCC)

A 5Gb/s Single-Ended Parallel Receiver with Adaptive FEXT Cancellation

Author | Seon-Kyoo Lee, Hyunsoo Ha, Hong-June Park, Jae-Yoon Sim


3.

IEEE International Solid-State Circuits Conference (ISSCC)

An 8GB/s Quad-Skew-Cancelling Parallel Transceiver in 90nm CMOS for High-Speed DRAM Interface

Author | Young-Sik Kim, Seon-Kyoo Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Bae Lee, Joo Sun Choi, Hong-June Park, Jae-Yoon Sim


4.

IEEE Asian Solid State Circuits Conference (A-SSCC)


5.

IEEE Asian Solid State Circuits Conference (A-SSCC)

A Single-Chip Time-Interleaved 32-Channel Analog Beamformer for Ultrasound Medical Imaging

Author | Ji-Yong Um, Jae-Hwan Kim, Eun-Woo Song, Yoon-Jee Kim, Jae-Yoon Sim, Hong-June Park


6.

International SoC Design Conference (ISOCC)

An On-chip TSV Emulation Using Metal Bar Surrounded by Metal Ring to Develop Interface Circuits

Author | Il-Min Yi, Seung-Jun Bae, Young-Soo Sohn, Jae-Yoon Sim, Hong-June Park


7.

International SoC Design Conference (ISOCC)


8.

SID Symposium Dig. Tech.

A 10-Touch Capacitive-Touch Sensor Circuit with the Time-Domain Input-Node Isolation

Author | Jae-seung Lee, Dong-Hee Yeo, Ji-Young Um, Eun-Woo Song, Jae-Yoon Sim, Hong-June Park

Year 2011

No.

Publication

Title


1.

IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

Phase-Blender-Based FIR Noise Filtering Techniques for ΔΣFractional-N PLL

Author | Dong-Woo Jee, Yunjae Suh, Hong-June Park,  Jae-Yoon Sim


2.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping ΔΣTDC

Author | Dong-Woo Jee, Young-Hun Seo, Hong-June Park, Jae-Yoon Sim


3.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 0.63ps Resolution, 11b Pipeline TDC in 0.13μm CMOS

Author | Young-Hun Seo, Jun-Seok Kim, Hong-June Park, Jae-Yoon Sim


4.

IEEE International Solid-State Circuits Conference (ISSCC)

A 0.1-fref BW 1GHz Fractional-N PLL with FIR-Embedded Phase-Interpolator-Based Noise Filtering

Author | Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim


5.

International SoC Design Conference

Time-Interleaved Sample Clock Generator for Ultrasound Beamformer Application

Author | Jae-Hwan Kim, Ji-Yong Um, Jae-Yoon Sim, Hong-June Park


6.

 IEEE Asian Solid-State Circuits Conference (ASSCC)


7.

 IEEE Asian Solid-State Circuits Conference (ASSCC)


8.

International Technical Conference on Circuits/Systems, Computers and Communications


9.

International Technical Conference on Circuits/Systems, Computers and Communications

Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

Author | Dong-Hee Yeo, Ki-Hwan Sung, Jong-Hoon Kim, Jae-Yoon Sim, Hong-June Park

~ Year 2010

No.

Publication

Title


1.

IEEE International Solid-State Circuits Conference (ISSCC)

A 1 GHz ADPLL with a 1.25ps Minimum-Resolution Sub-Exponent TDC in 0.18μm CMOS

Author | Seon-Kyoo Lee, Young-Hun Seo, Yunjae Suh, Hong-June Park, Jae-Yoon Sim


2.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 1.3μW 0.6V 8.7-ENOB Successive Approximation ADC in a 0.18μm CMOS

Author | Seon-Kyoo Lee, Seung-Jin Park, Yunjae Suh, Hong-June Park, Jae-Yoon Sim


3.

IEEE International Solid-State Circuits Conference (ISSCC)

A 650Mb/s-to-8Gb/s Referenceless CDR Circuit with Automatic Acquisition of Data Rate

Author | Seon-Kyoo Lee, Young-Sang Kim, Hyunsoo Ha, Young-Hun Seo, Hong-June Park, Jae-Yoon Sim


4.

IEEE Asian Solid-State Circuit Conference (ASSCC)

A Transistor-Based Background Self-Calibration for Reducing PVT Sensitivity with Design Example of an Adaptive Bandwidth PLL

Author | Seung-Jin Park, Suho Woo, Hyunsoo Ha, Yunjae Suh, Hong-June Park, Jae-Yoon Sim


5.

IEEE Asian Solid-State Circuit Conference (ASSCC)

A 8 GByte/s Transceiver with Current-Balanced Pseudo-Differential Signaling for Memory Interface

Author | Seon-Kyoo Lee, Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim


6.

IEEE Custom Integrated Circuits Conference (CICC)

A Low-Voltage OP Amp with Digitally Controlled Algorithmic Approximation

Author | Dong-Woo Jee, Seung-Jin Park, Hong-June Park, Jae-Yoon Sim


7.

International SoC Design Conference (ISOCC)

A 5 Gb/s 16-bit transmitter with segmented group-inversion encoding

Author | Seon-Kyoo Lee, Yong-Sang Kim, Hong-June Park, Jae-Yoon Sim


8.

International SoC Design Conference (ISOCC)

A serpentine guard trace to reduce the far-end crosstalk induced jitter of parallel microstrip lines

Author | Kyoungho Lee, Hyun-Bae Lee, Hae-Kang Jung, Hong-June Park, Jae-Yoon Sim


9.

IEEE International Solid-State Circuits Conference (ISSCC)

A 40-to-800MHz Locking Multi-Phase DLL

Author | Young-Sang Kim, Seung-Jin Park, Yong-Sub Kim, Dong-Bi Jang, Seh-Woong Jeong, Hong-June Park, Jae-Yoon Sim


10.

IEEE International Conference on Integrated Circuit Design and Technology (ICICDT)

High-Speed Links for Memory Interface

Author | Jae-Yoon Sim, Seon-Kyoo Lee, Young-Sik Kim, Young-Soo Sohn, Joo Sun Choi


11.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

Charge-transferred presensing and efficiently precharged negative word-line schemes for low-voltage DRAMs

Author | Jae-Yoon Sim, Young-Gu Gang, Kyu-Nam Lim, Joong-Yong Choi, Sang-Keun Kwak, Ki-Chul Chun, Jei-Hwan Yoo, Dong-Il Seo, Soo-In Cho


12.

IEEE International Solid-State Circuits Conference (ISSCC)

A 1.0V 256Mb SDRAM with offset-compensated direct sensing and charge-recycled precharge schemes

Author | Jae-Yoon Sim, Kee-Won Kwon, Jong-Hyun Choi, Seung-Hoon Lee, Dong-Min Kim, Hyung-Ryeol Hwang, Ki-Chul Chun, Young-Hoon Seo, Hong-Sun Hwang, Dong-Il Seo, Changhyun Kim, Soo-In Cho


13.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

Double boosting pump, hybrid current sense amplifier, and binary weighted temperature sensor adjustment schemes for 1.8V 128Mb mobile DRAMs

Author | Jae-Yoon Sim, Hongil Yoon, Ki-Chul Chun, Hyun-Seok Lee, Sang-Pyo Hong, Soo-Young Kim, Min-Soo Kim, Kyu-Chan Lee, Jei-Hwan Yoo, Dong-Il Seo, Soo-In Cho


13.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

840 Mb/s CMOS demultiplexed equalizing transceiver for DRAM-to processor communication

Author | Jae-Yoon Sim, Young-Soo Sohn, Hong-June Park, Changhyun Kim, Soo-In Cho


13.

IEEE Symposium on VLSI Technology and Circuits (VLSI)

A 1-Gb/s bidirectional I/O buffer using the current-mode scheme

Author | Jae-Yoon Sim, Hong-June Park, Soo-In Cho


14.

International Conference on VLSI and CAD

Investigation of requirements for high-speed DRAM interface using Rambus-C as an example

Author | Chan-Kyung Kim, Jong-Ki Nam, Jae-Yoon Sim, Hong-June Park, Jong-Sun Kim, Soo-In Cho


15.

International Conference on VLSI and CAD


16.

International Conference on VLSI and CAD


17.

International SoC Design Conference (ISOCC)


18.

IEEE Custom Integrated Circuits Conference (CICC)

A Crosstalk-and-ISI Equalizing Receiver in 2-Drop Single-Ended SSTL Memory Channel

Author | Jun-Hyun Bae, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Jae-Yoon Sim, Hong-June Park


18.

IEEE Custom Integrated Circuits Conference (CICC)

A Crosstalk-and-ISI Equalizing Receiver in 2-Drop Single-Ended SSTL Memory Channel

Author | Jun-Hyun Bae, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Jae-Yoon Sim, Hong-June Park


19.

IEEE Custom Integrated Circuits Conference (CICC)


20.

 Int. Conf. on Electronics, Information and Communication

Digital Circuit of USB 2.0 PHY High Speed RX Interface

Author | Dong-Hee Yeo, Sung-Hwan Jeon, Jae-Yoon Sim, Hong-June Park


21.

 Int. Conf. on Electronics, Information and Communication

TX Digital Circuit for USB 2.0 PHY High Speed Interface

Author | Dong-Hee Yeo, Sung-Hwan Jeon, Jae-Yoon Sim, Hong-June Park


22.

SID Symp. 

Dig. Tech.

A Low-EMI 2Gbps Clock-Aligned-to-Data Intra-Panel Interface (CADI) for TFT-LCD with the VSYNC-Embedded Clock and Equalization

Author | Hyung-Joon Chi, Young-Ho Choi, Soo-Min Lee, Jae-Yoon Sim, Hong-June Park, Jongjin Lim, Pil-Sung Kang, Bu-Yeol Lee, Jin-Cheol Hong, Hee-Sub Lee


23.

International SoC Design Conference (ISOCC)


24.

International SoC Design Conference (ISOCC)

A 5-7 Gbps Peak Detector for Serial-Link

Author | Jong-Hoon Kim, Jung-Bum Shin, Jae-Yoon Sim, Hong-June Park


25.

International SoC Design Conference (ISOCC)


26.

International SoC Design Conference (ISOCC)


27.

IEEE Asian Solid-State Circuit Conference (ASSCC)

A 4Gbps 3-bit parallel Transmitter with the Crosstalk-Induced Jitter Compensation Using TX Data Timing Control

Author | Hae-Kang Jung, Kyoungho Lee, Jong-Sam Kim, Jae-Jin Lee, Jae-Yoon Sim, Hong-June Park


28.

IEEE International Solid-State Circuits Conference (ISSCC)

A 3.2Gb/s 8b Single-Ended Integrating DFE RX for 2-Drop DRAM Interface with Internal Reference Voltage and Digital Calibration

Author | Hyung-Joon Chi, Jae-Seung Lee, Seong-Hwan Jeon, Seung-Jun Bae, Jae-Yoon Sim, Hong-June Park


29.

IEEE Custom Integrated Circuits Conference (CICC)

An All-Digital 90-Degree Phase-Shift DLL with Loop-Embedded DCC for 1.6Gbps DDR Interface

Author | Jun-Hyun Bae, Jin-Ho Seo, Hwan-Seok Yeo, Jae-Whui Kim, Jae-Yoon Sim, Hong-June Park


30.

Electronic Components and Technology Conference