Publication

International Conferences

Year 2024

No.

Publication

Title


1.

IEEE/ACM Design, Automation and Test in Europe Conference & Exhibition (DATE)

Trans-Net: Knowledge-Transferring Analog Circuit Optimizer with a Netlist-Based Circuit Representation (ACCEPTED)

Author | Ho-Jin Lee, Kyeong-Jun Lee, Youngchang Choi, Kyongsu Lee, Seokhyeong Kang, and Jae-Yoon Sim


2.

IEEE Symposium on VLSI Technology and Circuits (VLSI)


A 94fsrms-Jitter and −249.3dB FoM 4.0GHz Ring-Oscillator-based MDLL with Background Calibration of Phase Offset and Injection Slope Mismatch (ACCEPTED)

Author | Dongjun Park, Heesung Roh, Seon-kyoo Lee, and Jae-Yoon Sim


3.

IEEE Symposium on VLSI Technology and Circuits (VLSI)


A 246-fJ/b 13.3-Tb/s/mm Single-Ended Current-Mode Transceiver with Crosstalk Cancellation for Shield-Less Short-Reach Interconnect (ACCEPTED)

Author | Jaeho Lee, Kyongsu Lee, Jae-Yoon Sim, and Seon-kyoo Lee


4.

IEEE Symposium on VLSI Technology and Circuits (VLSI)


A Smart Contact Lens System with 433MHz Wireless Power and Data Transfer at a Modulation Index Down to 0.02% (ACCEPTED)

Author | Heesung Roh, Hyun Jin Yoo, Si-Youl Yoo, Seung Hee Pyen, Cheonhoo Jeon, and Jae-Yoon Sim


5.

European Solid-State Electronics Research Conference (ESSERC)

A 243 KOPS/W Crypto-Processor Supporting Homomorphic Encryption and Post-Quantum Cryptography for IoT Devices (ACCEPTED)

Author | Byungjun Kim, Han-Gyeol Mun, Kyeong-Jun Lee, Jeong-Min Woo, Kiseo Kang, Hyunwoo Son, Jae-Yoon Sim


6.

European Solid-State Electronics Research Conference (ESSERC)

A Cryo-CMOS 64-Channel Bias Generator IC for Surface Ion Trap (ACCEPTED)

Author | Sungbin Park, Seokchan Song (equally contributed), Keumhyun Kim, Hyegoo Lee, Moonjoo Lee, Jae-Yoon Sim


7.

European Solid-State Electronics Research Conference (ESSERC)

A 0.0102mm2 4.62nW Process-Skew and Temperature Compensated Current Reference Operating from −40°C to 125°C with 297ppm/°C (ACCEPTED)

Author | Geunyong Choi, Jae-Yoon Sim, Youngwoo Ji